1. Field of the Invention
The present invention relates to a gate shift register and a flat panel display using the same.
2. Discussion of the Related Art
As a flat panel display, there is a liquid crystal display, an organic light emitting diode display, or the like.
Generally, such a flat panel display includes a display panel for displaying an image, a gate driver for supplying a scan pulse to gate lines of the display panel, a data driver for supplying an image signal (data voltage) to data lines of the display panel, and a timing controller for controlling the gate driver and data driver. The gate driver includes a gate shift register for sequentially outputting a scan pulse in response to a gate control signal supplied from the timing controller.
Meanwhile, the recent tendency of such a flat panel display is toward enlargement and high resolution. In a flat panel display having an increased size and a higher resolution, resistance and capacitance components of gate lines are increased, thereby reducing the efficiency of charging and discharging scan pulses. In particular, reduction in scan pulse discharge efficiency causes failure of charging of an image signal in pixels. This causes degradation of picture quality.
As a scheme for solving the above-mentioned problems, there is a method for increasing the size of a switching element constituting an output buffer circuit in the gate shift register. However, this method causes an increase in the size of the gate driver which, in turn, increases costs. Also, in the case of a gate-in-panel (GIP) type gate driver, there is a problem in that it is difficult to design a narrow bezel due to an increase in the area of the GIP gate driver.